module automato_esqueleto (
        input clk,
        input rst_n,
	
        input [31:0] endereco_sniffer,
        input write_sniffer,
        input read_sniffer,
        input [31:0] dado_sniffer,
        input chipselect_sniffer,
	
        input [1:0] address,
        input read,
        input write,
        input chipselect,
        input [3:0] byteenable,
        input [31:0] writedata,
	
        output logic [31:0] readdata,
	
        output logic aut_int

    );

    logic write_r;
    logic read_r;

    logic [31:0] dados;
    logic tipo;
    logic [31:0] endereco;

    always_ff @(posedge clk)
    begin
        if(!rst_n)
        begin
            dados <= 0;
            tipo <= 0;
            endereco <= 0;
            write_r <= 0;
            read_r <= 0;
        end
        else
        begin
            write_r <= write_sniffer;
            read_r <= read_sniffer;
		
            if(chipselect)
            begin
                if(write)
                begin
                    if(address == 0)
                    begin
                        aut_int <= 0;
                    end
                end
                else if(read)
                begin
                    case(address)
                        0:
                        readdata <= {{(31){1'b0}}, aut_int};
                        1:
                        readdata <= dados;
                        2:
                        readdata <= {{(31){1'b0}}, tipo};
                        3:
                        readdata <= endereco;
                        default:
                        readdata <= 0;
                    endcase
                end
            end
            else if(chipselect_sniffer)
            begin
                dados <= 10;
		
                if(write_sniffer == 1 && write_r == 0)
                begin
                    aut_int <= 1;
                    tipo <= 0;
                    endereco <= endereco_sniffer;
                    dados <= dado_sniffer;
                end
                else if(read_sniffer == 1 && read_r == 0)
                begin
                    aut_int <= 1;
                    tipo <= 1;
                    endereco <= endereco_sniffer;
                    dados <= dado_sniffer;
                end
            end
        end
    end



endmodule
